Design-for-Test and Test Optimization Techniques for TSV-based 3D Stacked ICs

Design-for-Test and Test Optimization Techniques for TSV-based 3D Stacked ICs
Author :
Publisher : Springer Science & Business Media
Total Pages : 260
Release :
ISBN-10 : 9783319023786
ISBN-13 : 3319023780
Rating : 4/5 (780 Downloads)

Book Synopsis Design-for-Test and Test Optimization Techniques for TSV-based 3D Stacked ICs by : Brandon Noia

Download or read book Design-for-Test and Test Optimization Techniques for TSV-based 3D Stacked ICs written by Brandon Noia and published by Springer Science & Business Media. This book was released on 2013-11-19 with total page 260 pages. Available in PDF, EPUB and Kindle. Book excerpt: This book describes innovative techniques to address the testing needs of 3D stacked integrated circuits (ICs) that utilize through-silicon-vias (TSVs) as vertical interconnects. The authors identify the key challenges facing 3D IC testing and present results that have emerged from cutting-edge research in this domain. Coverage includes topics ranging from die-level wrappers, self-test circuits, and TSV probing to test-architecture design, test scheduling, and optimization. Readers will benefit from an in-depth look at test-technology solutions that are needed to make 3D ICs a reality and commercially viable.

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