Download or read book VLSI Architectures and Associated CAD Algorithms for High Performance LDPC Codecs written by Marghoob Mohiyuddin and published by . This book was released on 2004 with total page 82 pages. Available in PDF, EPUB and Kindle. Book excerpt: Error correcting codes are widely used in digital communication and storage applications. Traditionally, codec implementation complexity has been measured with a software implementation in mind. We address the VLSI implementation issues for the design of a class of error correcting codes - Low Density Parity Check Codes (LDPCs). Keeping hardware implementation issues in mind, we propose a heuristic algorithm to design an LDPC code. We also motivate the case for multi-rate LDPC coding/decoding and propose a reconfigurable VLSI architecture for multirate LDPC decoders. In addition, we describe a heuristic algorithm that computes an effective LDPC code of any given rate which by construction can be implemented on our reconfigurable LDPC decoder