Reimagining the Role of Network-on-Chip Resources Toward Improving Chip Multiprocessor Performance
Author | : Karthik Sangaiah |
Publisher | : |
Total Pages | : 141 |
Release | : 2020 |
ISBN-10 | : OCLC:1232925476 |
ISBN-13 | : |
Rating | : 4/5 ( Downloads) |
Download or read book Reimagining the Role of Network-on-Chip Resources Toward Improving Chip Multiprocessor Performance written by Karthik Sangaiah and published by . This book was released on 2020 with total page 141 pages. Available in PDF, EPUB and Kindle. Book excerpt: The design of on-chip communication networks is paramount to sustaining and improving the computation throughput of many-core chip multiprocessors (CMP). As advances in packaging technologies, such as multi-die systems (MDS), have enabled scaling up of CMPs to host hundreds of CPU cores within a package, Network-on-Chips (NoC) are critical for scalably moving data between cores and memory. However, as a growing component in many-core CMPs, scrutiny needs to be applied on how NoCs are modeled, how tradeoffs are made with the rest of the CMP uncore, and how NoC provisioning can impact system performance. Using the tools and design space exploration methodologies detailed in this dissertation, contemporary NoCs are found to frequently experience long periods of idle time, with less than 10% network link and router utilization in High Performance Computing (HPC) applications. The combination of this design slack and the available resources of modern packaging technologies present opportunities to have a fundamental shift in the utility of network routers, toward NoCs embedded with computation functionality. This dissertation focuses on several aspects of the modeling and design of heterogeneous computation-embedded NoCs. First, modeling and simulation techniques are explored to mitigate the simulation wall that challenges the ability to simulate HPC workloads on contemporary NoC-based CMPs and explores design space exploration strategies to analyze the trends and trade-offs between the NoC and the remaining components of the uncore. Using these tools and analysis of design trends, an in-network processing (INP) platform is explored that improves the computational throughput and energy efficiency of CMPs by using the available network resources for stream-based computation. The design of the INP platform is explored in a resource-constrained CMP and future 2.5D many-core MDS topologies.